The present invention relates to a semiconductor package, and more particularly, to a stacked semiconductor package.
Recent research trend of an electronic industry is to develop a miniaturized semiconductor. A System On Chip (SOC) technique and a System In Package (SIP) technique are used for miniaturizing a semiconductor. Several separate semiconductor elements are integrated into one semiconductor chip employing the SOC technique. A plurality of semiconductor chips are combined into one semiconductor package using the SIP technique. In specific, in the SIP technique, the plurality of semiconductor chips are loaded vertically or horizontally on a substrate to be integrated into a semiconductor package. This SIP technique is similar to an existing Multi-Chip Module (MCM) technique. A difference is that the semiconductor chips are loaded horizontally in the MCM but the semiconductor chips are stacked vertically in SIP.
According to the SIP, the plurality of semiconductor chips are located up and down and opposite to each other at a close distance. This stacked structure enables an electromagnetic wave and a noise to have an influence on the semiconductor chips, or enables Electro Magnetic Interference (EMI), which causes malfunctions of an internal circuit in a semiconductor, to occur due to the electromagnetic wave induced from an external.
Particularly, when a semiconductor memory having a large switching noise and a Radio Frequency (RF) chip very sensitive to a noise are packaged together, performances of the RF chip may be seriously degraded due to the EMI.